1. Field of the Invention
The present invention relates to a data receiving system for receiving frequency shift keyed (FSK) signals, and more particularly to a direct-conversion type FSK-data receiving system suitable for realizing a small sized apparatus and a low-power consumption.
2. Description of the Prior Art
A direct-conversion system has been used as a receiver suitable for integration and adopted to a pager-type receiving apparatus and the like recently. Some of already known systems are, for example, a demodulation system which carries out a demodulation based on a phase relationship between a pair of quadrature channels and a demodulation system which carries out a demodulation based on a frequency difference between an output signal obtained from a carrier wave signal frequency and an output signal obtained from a local oscillator signal frequency being slightly offset from the carrier wave and so on.
Also, already known system is a demodulation system which consists of one series of high-frequency circuit portions and shifts a phase of a local oscillator signal so as to execute a demodulation. (For example, refer to Japanese Laid-open Patent Application No. SHO 64-84948)
This conventional direct-conversion receiving system is explained hereinafter with reference to FIG. 32.
In FIG. 32, a reference numeral 501 denotes a frequency converter, and a reference numeral 502 denotes a filter circuit. A reference numeral 503 denotes a limiter circuit, and a reference numeral 504 denotes an exclusive-OR circuit. A reference numeral 505 denotes a counter circuit, and a reference numeral 506 denotes a shift register circuit. A reference numeral 507 denotes a switching control circuit, and a reference numeral 508 denotes a 0.degree./90.degree. phase-switching circuit. Further, a reference numeral 509 denotes a local oscillator.
An operation of the direct-conversion receiving system constituted as above is explained as follows.
In a first-half of an FSK-modulated 1-bit data, the 0.degree./90.degree. phase-switching circuit 508 is set to 0.degree.. And the FSK-modulated data is converted into a base-band signal in the frequency converter 501 and subsequently sent through the filter circuit 502, the limiter circuit 503 to the shift register circuit 506 to store its waveform.
On the other hand, in a second-half of the FSK-modulated 1-bit data, the 0.degree./90.degree. phase-switching circuit 508 is set to 90.degree.. And, in the same manner, the FSK-modulated data is shaped its waveform through the frequency converter 501, the filter circuit 502, and the limiter circuit 503.
The waveform of the first-half of the FSK-modulated 1-bit data which is previously stored in the shift register circuit 506 is read out from a last written part (last-in last-out) by being offset by an amount of 90.degree.. Then, thus read out waveform is supplied together with the second-half waveform of the FSK-modulated 1-bit data to the exclusive-OR circuit 504.
As to a phase change, an output base-band signal from the exclusive-OR circuit 504 changes +90.degree./-90.degree. in accordance with the FSK-modulated signal data by the 0.degree./90.degree. phase change of the local oscillator signal.
By reading out the waveform stored in the shift register 506 by offsetting 90.degree., the read out signal becomes the same-phase or the opposite-phase with respect to the local oscillator signal being switched by an amount of 0.degree./90.degree.. Therefore, by checking an exclusive-OR result of both signals, a judgement of "1"/"0" becomes possible.
However, in accordance with the above-described conventional system, since the phase of the local oscillator signal is changed between the first-half and the second-half of the 1-bit data, a measure for synchronizing with the 1-bit data becomes requisite for this system.
Furthermore, in the case where a frequency deviation of the FSK-modulated signal is small compared with the transmission speed, a signal period included in 1-bit data becomes small. Therefore, it becomes difficult to check an interrelationship between a first-half waveform and a second-half waveform in the 1-bit data.
Moreover, in the case where the frequency of the local oscillator signal is offset, in either side of a plus or a minus of the FSK-modulated data, a signal period included in 1-bit data becomes also small. Therefore, its demodulation becomes difficult as well as the case where the transmission speed is high.
Still further, since the local oscillator is associated with the phase-shift circuit, the local oscillator requires a large output power to compensate the loss in the phase-shift circuit. Also, in a direct conversion receiver, it may happen that the local oscillator signal leaks toward the received carrier wave signal since both signals have substantially the same frequencies.
On the other hand, an another example of already known FSK data receiving systems is disclosed in Japanese Laid-open Patent Application No. SHO 55-14701. This conventional system is explained hereinafter with reference to FIG. 33.
In FIG. 33, a reference numeral 560 denotes an input terminal of FSK data receiving system, and reference numerals 561, 562 denote mixers. A reference numeral 563 denotes a local oscillator, and a reference numeral 564 denotes a 90.degree. phase-shift circuit. Reference numerals 565, 566 denote low-pass filters, and reference numerals 567, 568 denote I-signal and Q-signal, respectively.
Further, reference numerals 569, 570 denote limiter amplifiers, and reference numerals 571, 572 denote digital signals. A reference numeral 573 denotes a D-type flip-flop circuit, and a reference numeral 574 denotes its output signal.
With this arrangement, an FSK data inputted into the input terminal 560 is supplied to both the mixer 561 and the mixer 562 at the same time. A local oscillator signal generated from the local oscillator 563 is supplied to the mixer 561 to mix with the FSK data. The local oscillator is also supplied to the 90.degree. phase-shift circuit 564. An output signal from the 90.degree. phase-shift circuit 564 is supplied to the mixer 562 to mix with the FSK data.
An output signal from the mixer 561 is sent to the low-pass filter 565 to generate the I-signal 567. On the other hand, an output signal from the mixer 562 is sent to the low-pass filter 566 to generate the Q-signal 568.
The I-signal 567 and the Q-signal 568 are transformed into digital signals 571 and 572 through the limiter amplifiers 569 and 570, respectively.
The digital signal 571 is inputted into a data input terminal of the D-type flip-flop circuit 573, and the digital signal 572 is inputted into a clock input terminal of the D-type flip-flop circuit 573. The D-type flip-flop 573 generates the output signal 574 which is used for a demodulation.
However, in such a conventional data receiving system, the digital signals are obtained by directly inputting the I-signal and the Q-signal into the limiter amplifiers. Therefore, if the base-band signal has a small voltage close to a judging voltage of the limiter amplifier, noises may cause the I/Q signal to accidentally cross the judging voltage of the limiter amplifier, thus generating undesirable error digital signals. Consequently, a demodulation becomes difficult.